Three-phase three-level inverter in closed loop current control mode while connected to a three-phase grid

The circuit files for this case are in these two links:
circuit_files.zip
circuit_files.tar.gz

This is a continuation of the previous case where a single-phase three-level inverter was simulated in open loop. The purpose was to describe the modulation strategy used for a three-level inverter and to present the three level switching waveform. In this simulation, the modulation strategy is extended to a three-phase converter and a current control loop is implemented. In fact, the phase locked loop (PLL) and the current control loop have been reused from the case "Three Phase Grid Connected Inverter with L Filter" ( click here).

To start the case, the three-phase voltages with the operation of the PLL is shown below.











As can be seen from the plot of frequency generated by the PLL, the PLL settles in about 0.22s. However, a functional value of frequency can be obtained from about 0.1s. Therefore, the inverter will remain off for 0.1s and will turn on only after the PLL has stabilized to some extent. The figure below shows the performance of the three-level inverter. The currents are zero until 0.1s, as the switching signals are blocked. At 0.1s, the transients are fairly violent. However, there are techniques which can be used to minimize it. Those have not been used here. The current control used is a PI controller applied in synchronously rotating reference frame. The reference for the current is id = 50A and iq = 0.











The next figure shows the voltage at the output of the inverter. Until 0.1s, since the inverter is off, the grid line to line voltage appears here. After 0.1s, the three level output of the inverter appears.






The next figure shows the controller tracking performance. In this case the green trace is id while the red trace is iq. id settles to -50A. The negative sign is merely due to the direction in which current in measured. Since, the dc bus of the inverter is a constant dc voltage, the inverter has the capacity to absorb or supply active or reactive power.







At this point, it would be interesting to compare the performance of a two level and a three level inverter. Examine the circuit in two_level_3ph.csv and the two level switching modulator in two_level_3ph_mod.py. All other parameters remain the same - dc bus, inductor filter, grid, controller parameters. The following plot shows the performance of a three-level and a two level inverter with respect to the current waveform.






The red trace is the current generated by the three-level inverter while the green trace is the current generated by the two-level inverter. It is quite clear from the above plot that the ripple content in a three-level converter is significantly lower than a two level inverter.

The next figure will show the current generated by the two level converter and the switching waveform.
















This case shows how a three-level inverter has improved performance in terms of reduced harmonics. This three-level inverter will be used extensively in simulating a wind farm at a later stage. Furthermore, both the three-level inverter and the two-level inverter were simulated simultaneously for this case study. This was the advantage of the circuit simulator as proposed initially. The aim was to be able to simulate systems without burdening the CPU. In a separate case, 4 of these simulations were run simultaneously on a Dell Inspiron 1525 laptop (8 years old) and all the simulations were completed in 3 hours. Moreover, this was done in parallel to the usual activities such as having an active web browser open with downloads in progress. It would be interesting to see if with an increase in the size of the circuits, this CPU utilization can be maintained.